Please consult our Documentation page for snickerdoodle footprint drawings and pinout tables.

You can find additional resources on our

Below is a list of snickerdoodle component temperature ranges:

667MHz Zynq 7010 (XC7Z010-CLG400C): 0C to 85C
866MHz Zynq 7020 (XC7Z020-CLG400E): 0C to 100C

Single-Band WL1801 Radio (WL1801MODGBMOCx): -20C […]

snickerdoodle is the size of a standard US business card: 2.0″ x 3.5″ (50.8mm x 88.9mm) – more detailed dimensions can be found here.

Here […]

No. With two “hard” ARM Cortex-A9 processor cores inside the Zynq SoC, snickerdoodle supports a wide range of real-time and general-purpose operating systems. Alternatively, if […]

All the JTAG pins are available on J2. These are most easily accessible on a) a “connectors down” board plugged into a snickerdoodle baseboard containing […]

The voltage levels for the FPGA I/O pins (JA1, JA2, JB1, JB2, JC1) are settable to between 1.2V and 3.3V.

snickerdoodle one has two independent “banks” […]

Due to the mix of Processing Subsystem (PS “MIO”) and Programmable Logic (PL “EMIO”) I/O—in addition to the reconfigurability of the FPGA pins—there is no […]

snickerdoodle has 16 differential ADC pairs spread across two FPGA I/O connectors: JA1 and JA2. These 16 channels are multiplexed into 2x 1MSPS 12-bit ADCs.

Reference […]

Assuming everything else is “right,” the most likely cause is that no reference voltage is being applied to Pin 3. To output +3.3V, simply jumper […]

snickerdoodle’s Zynq LVDS SerDes capabilities extend to 950 Mbps @ 475MHz DDR and 1250Mbps @ 625MHz DDR for snickerdoodle one and snickerdoodle black, respectively.

snickerdoodle’s